mirrors/Odin
1
0
Fork 0
mirror of https://github.com/odin-lang/Odin.git synced 2026-06-01 16:31:13 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add intrinsics.simd_select

Browse Source
This commit is contained in:
gingerBill
2022-05-25 23:34:41 +01:00
parent 57e69ea392
commit 7002c94a63
4 changed files with 66 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
core/simd/simd.odin
View File

@@ -74,6 +74,7 @@ reduce_xor :: intrinsics.simd_reduce_xor
swizzle :: builtin.swizzle
shuffle :: intrinsics.simd_shuffle
select :: intrinsics.simd_select
splat :: #force_inline proc "contextless" ($T: typeid/#simd[$LANES]$E, value: E) -> T {
return T{0..<LANES = value}

51
src/check_builtin.cpp
View File

@@ -815,6 +815,57 @@ bool check_builtin_simd_operation(CheckerContext *c, Operand *operand, Ast *call
return true;
}
case BuiltinProc_simd_select:
{
Operand cond = {};
check_expr(c, &cond, ce->args[0]); if (cond.mode == Addressing_Invalid) { return false; }
if (!is_type_simd_vector(cond.type)) {
error(cond.expr, "'%.*s' expected a simd vector boolean type", LIT(builtin_name));
return false;
}
if (!is_type_boolean(base_array_type(cond.type))) {
error(cond.expr, "'%.*s' expected a simd vector boolean type", LIT(builtin_name));
return false;
}
Operand x = {};
Operand y = {};
check_expr(c, &x, ce->args[1]); if (x.mode == Addressing_Invalid) { return false; }
check_expr_with_type_hint(c, &y, ce->args[2], x.type); if (y.mode == Addressing_Invalid) { return false; }
convert_to_typed(c, &y, x.type);
if (!is_type_simd_vector(x.type)) {
error(x.expr, "'%.*s' expected a simd vector type", LIT(builtin_name));
return false;
}
if (!is_type_simd_vector(y.type)) {
error(y.expr, "'%.*s' expected a simd vector type", LIT(builtin_name));
return false;
}
if (!are_types_identical(x.type, y.type)) {
gbString xs = type_to_string(x.type);
gbString ys = type_to_string(y.type);
error(x.expr, "'%.*s' expected 2 results of the same type, got '%s' vs '%s'", LIT(builtin_name), xs, ys);
gb_string_free(ys);
gb_string_free(xs);
return false;
}
if (cond.type->SimdVector.count != x.type->SimdVector.count) {
error(x.expr, "'%.*s' expected condition vector to match the length of the result lengths, got '%lld' vs '%lld'",
LIT(builtin_name),
cast(long long)cond.type->SimdVector.count,
cast(long long)x.type->SimdVector.count);
return false;
}
operand->mode = Addressing_Value;
operand->type = x.type;
return true;
}
// case BuiltinProc_simd_rotate_left:
// {

2
src/checker_builtin_procs.hpp
View File

@@ -159,6 +159,7 @@ BuiltinProc__simd_begin,
BuiltinProc_simd_reduce_xor,
BuiltinProc_simd_shuffle,
BuiltinProc_simd_select,
BuiltinProc__simd_end,
// Platform specific intrinsics
@@ -421,6 +422,7 @@ gb_global BuiltinProc builtin_procs[BuiltinProc_COUNT] = {
{STR_LIT("simd_reduce_xor"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_shuffle"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_select"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT(""), 0, false, Expr_Stmt, BuiltinProcPkg_intrinsics},

12
src/llvm_backend_proc.cpp
View File

@@ -1296,6 +1296,18 @@ lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAndValue const
res.value = LLVMBuildShuffleVector(p->builder, arg0.value, arg1.value, mask, "");
return res;
}
case BuiltinProc_simd_select:
{
LLVMValueRef cond = arg0.value;
LLVMValueRef x = lb_build_expr(p, ce->args[1]).value;
LLVMValueRef y = lb_build_expr(p, ce->args[2]).value;
cond = LLVMBuildICmp(p->builder, LLVMIntNE, cond, LLVMConstNull(LLVMTypeOf(cond)), "");
res.value = LLVMBuildSelect(p->builder, cond, x, y, "");
return res;
}
}
GB_PANIC("Unhandled simd intrinsic: '%.*s'", LIT(builtin_procs[builtin_id].name));