Commit Graph

15 Commits

Author SHA1 Message Date
Brendan Punsky
930b988ebf rexcode/mips: FPU conditional-move + convert-to-FP forms
MOVN/MOVZ.S/.D (FP move on GPR nonzero/zero, enc {FD,FS,RT}), MOVF/MOVT.
S/.D (FP move on FP condition code, enc {FD,FS,FCC_BC}), and the
convert-to-FP forms FCVT_D_W/S_D/S_W (cvt.d.w/cvt.s.d/cvt.s.w). 11 forms.
Spot-checked byte-exact vs llvm-mc and decode-clean; 281 tests green.
2026-06-18 03:27:23 -04:00
Brendan Punsky
5b47f0ca29 rexcode/mips: MSA INSVE + DSP ASE 3-register/compare/shift forms
MSA INSVE (.B/.H/.W/.D element insert). DSP ASE three-register ops
(ADDU/SUBU/MULEQ/MULEU/MULQ/PRECRQ*/PICK/CMPGU, enc {RD,RS,RT}), the
variable shifts SHLLV/SHRAV/SHRLV (enc {RD,RT,RS} -- value is Rt, shift is
Rs), and the compares CMP/CMPU (.PH/.QB, {RS,RT}). 38 forms reusing the
existing GPR R-type slots. Spot-checked byte-exact vs llvm-mc; 281 tests
green.
2026-06-18 03:24:20 -04:00
Brendan Punsky
4ab24007b7 rexcode/mips: MSA BIT-shift, element-index, GPR-index, I8 forms
New MSA_BIT_SHIFT / MSA_ELM_IDX / MSA_I8 encodings (the data-format marker
is fixed in the entry bits; the operand drives the low bits; decode infers
df from the marker). SLLI/SRAI/SRLI (.B/.H/.W/.D shift), SPLATI/SLDI
(element index), SPLAT/SLD (GPR index), VSHF (.B/.H/.W/.D shuffle), and
the I8 forms ANDI/ORI/XORI/NORI/BMNZI/BMZI/BSELI.B + SHF.B/H/W. 42 forms.
Spot-checked byte-exact vs llvm-mc and decode-clean across all formats;
281 tests green.
2026-06-18 03:17:39 -04:00
Brendan Punsky
307aa2a9dd rexcode/mips: MSA 3RF/3R/2R/2RF/VEC encode forms (specgen)
New mips specgen (llvm-mc --triple=mips --mattr=+msa as the bits oracle,
big-endian words, empirical masks): vector FP arithmetic/compare FADD/
FSUB/FMUL/FDIV/FMAX/FMIN/FCEQ/FCLE/FCLT/FCNE (.W/.D), dot product DOTP_S/U
(.H/.W/.D), count/popcount NLOC/NLZC/PCNT (.B/.H/.W/.D), one-source FP
FSQRT/FRSQRT/FRCP/FRINT/FTRUNC_S/U/FFINT_S/U (.W/.D), and bit-select
BMNZ/BMZ/BSEL.V. 57 forms reusing the existing WD/WS/WT slots. Spot-
checked byte-exact vs llvm-mc and decode-clean; 281 tests green.
2026-06-18 03:11:41 -04:00
Brendan Punsky
1b72d425d4 rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen
Add generated mnemonic_builders.odin (inst_<mnem>/emit_<mnem> typed overload sets) for arm32, arm64, mips, riscv, ppc, ppc_vle, rsp, mos6502 and mos65816, matching the existing x86 builders. Each is produced by a per-arch tools/gen_mnemonic_builders.odin that walks ENCODE_FORMS and maps operand types to typed params + op_* constructors.

Anchor every generator's output via #directory so regeneration is CWD-independent; previously the bare "mnemonic_builders.odin" path wrote to the current directory and misfired when run from the repo root.

Wire a --builders task into build.lua (folded into 'all', covered by --idempotent, enforced by the structural invariants) and document it in the README.
2026-06-15 12:52:10 -04:00
gingerBill
406dfbe86d Minimize mips Instruction and Operand 2026-06-15 14:29:14 +01:00
gingerBill
b733f7d7a4 Use @(rodata) where appropriate for the table generation 2026-06-15 13:56:24 +01:00
Flāvius
a4f08f8307 Load rexcode encode/decode tables from committed binary blobs
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives
in a per-arch tablegen/ metaprogram that flattens it and serializes committed
binary blobs; the library #loads those into @(rodata) at compile time rather
than compiling a table body. No arch keeps encoding_table.odin or
decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin.

* Two-stage, type-checked pipeline: tablegen Stage A emits human-readable
  generated Odin, which compiles and serializes the blobs in Stage B.
* encode() goes through encoding_forms(m); decoders are unchanged apart from
  x86's flattened 2-D index. Decode tables are byte-identical to the old ones.
* build.lua: a LuaJIT driver for the metaprograms, validations, and tests,
  with cross-platform gating and a clear report.
* Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md
  trimmed to what was actually built.
* Attribution headers added to all rexcode source files; the generators emit
  them so generated files keep them.
2026-06-15 07:43:29 -04:00
gingerBill
ecf9a305ee Add @(require_results) to register procedures 2026-06-14 22:00:37 +01:00
gingerBill
5c9cd0146d Add @(require_results) to operand procedures 2026-06-14 21:57:27 +01:00
gingerBill
611cc807cd Add @(require_results) to instruction procedures 2026-06-14 21:54:24 +01:00
gingerBill
ced500fc94 Add fmt formatting to the Instruction.operands 2026-06-14 21:52:14 +01:00
gingerBill
67dfa25696 Minimize MIPS decode table 2026-06-14 19:22:17 +01:00
gingerBill
a8d7aedf1e Add rodata where appropriate 2026-06-14 16:50:21 +01:00
gingerBill
d6ae77b67e core:rexcode 2026-06-14 16:30:18 +01:00